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1 |
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2 |
/* ET4000 registers from SVGALIB 0.81 */
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3 |
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4 |
/* Define DAC_TYPE to force the DAC type used in the ET4000 driver. If it */
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5 |
/* is not defined, the driver tries to autodetect the DAC type which may go */
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6 |
/* wrong. */
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7 |
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8 |
/* Use the following values:
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9 |
0: Ordinary DAC
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10 |
1: Sierra SC11486 (32k)
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11 |
3: Sierra 32k/64k
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12 |
5: SS2410 15/24bit DAC
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13 |
9: AT&T 20c491/2 (32k/64k/24bit)
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14 |
17: Acumos ADAC (Cirrus Logic DAC)
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15 |
33: Sierra 15025/6 24-bit DAC
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16 |
*/
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17 |
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18 |
#define DAC_TYPE 0
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19 |
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20 |
/* unsupported modes */
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21 |
#define g320x200x64K_regs DISABLE_MODE
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22 |
#define g320x200x16M_regs DISABLE_MODE
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23 |
#define g800x600x16_regs DISABLE_MODE
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24 |
#define g1024x768x16_regs DISABLE_MODE
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25 |
#define g1280x1024x16_regs DISABLE_MODE
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26 |
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27 |
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28 |
/* Got this mode from someone's tseng3.exe dump. */
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29 |
/* ET4000 HiColor BIOS mode 0x13 -- 320x200x32K */
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30 |
/* Video timing: Vertical frequency : 70.3Hz
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31 |
Horizontal frequency : 31.6KHz */
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32 |
static unsigned char g320x200x32K_regs[73] =
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33 |
{
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34 |
0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0xBF, 0x1F, 0x00, 0x41, 0x00, 0x00,
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35 |
0x00, 0x00, 0x00, 0x00, 0x9C, 0x8E, 0x8F, 0x50, 0x60, 0x96, 0xB9, 0xAB,
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36 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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37 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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38 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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39 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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40 |
0x63,
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41 |
0x00, 0x00, 0x28, 0x00, 0x08, 0x00, 0x43, 0x0F, 0x00, 0xFC, 0x00, 0x00,
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42 |
0x00
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43 |
};
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44 |
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45 |
/* ET4000 BIOS mode 2Eh - 640x480x256 */
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46 |
static unsigned char g640x480x256_regs[73] =
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47 |
{
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48 |
0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
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49 |
0x00, 0x00, 0x00, 0x00, 0xEA, 0x8C, 0xDF, 0x50, 0x60, 0xE7, 0x04, 0xAB,
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50 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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51 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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52 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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53 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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54 |
0xE3,
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55 |
0x00, 0x00, 0x28, 0x00, 0x08, 0x00, 0x03, 0x0F, 0x00, 0xFC, 0x00, 0x00,
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56 |
0x00
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57 |
};
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58 |
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59 |
/* ET4000 BIOS mode 30h - 800x600x256 */
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60 |
static unsigned char g800x600x256_regs[73] =
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61 |
{
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62 |
0x7F, 0x63, 0x64, 0x02, 0x6A, 0x1D, 0x77, 0xF0, 0x00, 0x60, 0x00, 0x00,
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63 |
0x00, 0x00, 0x00, 0x00, 0x5D, 0x8F, 0x57, 0x64, 0x60, 0x5B, 0x74, 0xAB,
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64 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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65 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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66 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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67 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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68 |
0xE3,
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69 |
0x00, 0x00, 0x28, 0x00, 0x0A, 0x00, 0x03, 0x0F, 0x00, 0xFC, 0x00, 0x00,
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70 |
0x00
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71 |
};
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72 |
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73 |
/* ET4000 BIOS mode 38h - 1024x768x256 */
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74 |
static unsigned char g1024x768x256_regs[73] =
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75 |
{
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76 |
0xA1, 0x7F, 0x80, 0x04, 0x89, 0x99, 0x26, 0xFD, 0x00, 0x60, 0x00, 0x00,
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77 |
0x00, 0x00, 0x00, 0x00, 0x08, 0x8A, 0xFF, 0x80, 0x60, 0x04, 0x22, 0xAB,
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78 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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79 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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80 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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81 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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82 |
0xEB,
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83 |
0x00, 0x00, 0x28, 0x00, 0x08, 0x00, 0x03, 0x0F, 0x00, 0xBC, 0x00, 0x00,
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84 |
0x00
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85 |
};
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86 |
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87 |
static unsigned char g800x600x32K_regs[73] =
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88 |
{
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89 |
0xF9, 0xC7, 0xC9, 0x9B, 0xCF, 0x8F, 0x78, 0xF0, 0x00, 0x60, 0x00, 0x00,
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90 |
0x00, 0x00, 0x00, 0x00, 0x5C, 0x8E, 0x57, 0xC8, 0x60, 0x5B, 0x75, 0xAB,
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91 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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92 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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93 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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94 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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95 |
0xEF,
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96 |
0x00, 0x00, 0x28, 0x00, 0x08, 0x00, 0x03, 0x0F, 0x00, 0xBC, 0x00, 0x00,
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97 |
0x06
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98 |
};
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99 |
#define g800x600x64K_regs g800x600x32K_regs
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100 |
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101 |
static unsigned char g640x480x16M_regs[73] =
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102 |
{
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103 |
0x27, 0xEF, 0xF2, 0x88, 0xF8, 0x98, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
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104 |
0x00, 0x00, 0x00, 0x00, 0xEA, 0x0C, 0xDF, 0xF0, 0x60, 0xE7, 0x04, 0xAB,
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105 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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106 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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107 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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108 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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109 |
0xEF,
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110 |
0x00, 0x00, 0x28, 0x00, 0x0A, 0x00, 0x03, 0x0F, 0x01, 0xBC, 0x00, 0x00,
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111 |
0x00
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112 |
};
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113 |
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114 |
static unsigned char g640x480x32K_regs[73] =
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115 |
{
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116 |
0xC3, 0x9F, 0xA1, 0x85, 0xA7, 0x1F, 0x0B, 0x3E, 0x00, 0x40, 0x00, 0x00,
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117 |
0x00, 0x00, 0x00, 0x00, 0xEA, 0x8C, 0xDF, 0xA0, 0x60, 0xE7, 0x04, 0xAB,
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118 |
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
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119 |
0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00, 0x00,
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120 |
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF,
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121 |
0x03, 0x01, 0x0F, 0x00, 0x0E,
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122 |
0xE3,
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123 |
0x00, 0x00, 0x28, 0x00, 0x08, 0x00, 0x03, 0x0F, 0x00, 0xBC, 0x00, 0x00,
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124 |
0x00
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125 |
};
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126 |
#define g640x480x64K_regs g640x480x32K_regs
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